I2S HUNG configure register.
LC_FIFO_TIMEOUT | the i2s_tx_hung_int interrupt or the i2s_rx_hung_int interrupt will be triggered when fifo hung counter is equal to this value |
LC_FIFO_TIMEOUT_SHIFT | The bits are used to scale tick counter threshold. The tick counter is reset when counter value >= 88000/2^i2s_lc_fifo_timeout_shift |
LC_FIFO_TIMEOUT_ENA | The enable bit for FIFO timeout |